Q Series CPU Direct
Click here to see this page in full context

Q Series Motion Controller (Q***HCPU)

Device

Bit Address

Word Address

32

bits

Notes

Input Relay

X0000-X1FFF

X0000-X1FF0

Output Relay

Y0000-Y1FFF

Y0000-Y1FF0

Internal Relay

M00000-M08191

M00000-M08176

Special Relay

SM0000-SM0255

SM0000-SM0240

Latch Relay

L00000-L08191

L00000-L08176

Annunciator

F00000-F02047

F00000-F02032

 

Link Relay

B0000-B1FFF

B0000-B1FF0

Data Register

------

D0000000-D0008191

Special Register

------

SD0000-SD0255

Link Register

------

W0000-W1FFF

Motion Register (#)*1

------

%MR0000-%MR8191*2

 

*1No. 2 to No. 4 can be allocated to the motion CPU.

*2Device name with motion CPU is #.

 

NOTE